1. Field of the Invention
The present invention relates to a charge coupled device storage module, hereinafter called a CCD storage module, having storage positions which are arranged in cascade and which are formed with the aid of electrodes arranged in insulated fashion above a semiconductor substrate, and more particularly to such a module in which, in respect of each storage position, an item of information incoming as a n-digit binary number is stored in that a quantity of charge consisting of i unit charges is stored in respect of each storage position, where i corresponds to the value of the binary number of the information.
CCD memories or charge shift arrangements are well known in the art (e.g., "Electronics," June 21, 1971, page 58ff, and the "Bell System Technical Journal," Vol. 940, Edition 4/1970 pages 587-593). These arrangements fundamentally consist of a semiconductor substrate, and electrically insulating layer applied thereto, and electrodes applied to the insulating layer. The electrodes are electrically isolated from one another. The principle of the CCD storage is based upon the connection of suitably selected voltages to the electrodes in order to produce favorable potential conditions at the boundary surface between the insulating layer and the semiconductor substrate, in which minority charge carriers can be stored. A special write-in device feeds minority charge carriers into these potential wells at a suitable point of time or blocks the inflow of minority charge carriers as determined by the particular item of information to be written in. Thus, charge shift arrangements of this type are particularly suitable for use in shift registers.
It is also known in the art to employ charge shift arrangements as memories. For this purpose, at the beginning of the charge shift arrangement which is constructed as a shift register and in the following will be referred to as a storage field, there is provided an input stage, and at the output of the storage field there is provided an output stage, and between the output stage and the input stage of the storage field there is provided a regenerator stage. This type of construction can be referred to as a storage loop. As the individual storage positions of a storage loop of this kind are only able to store the information for a specific length of time, the stored item of information constantly circulates. In doing so, it is also fed across the regenerator stage and thus regenerated during each cycle.
In the development of CCD stores, it is desirable to achieve as great as possible a storage density upon a semiconductor substrate. Several methods by which this goal can be achieved have already been proposed.
The first method resides in structure reduction. This method is fundamentally the aim of the technological development.
A second method consists in circuitry measures. For example, the E/B principle described in the "IEEE Journal of Solid State Circuits," February 1976, Vol. SC-11, No. 1, Section C on pages 8 and 9, which is applied to a storage field arranged in accordance with the SPS principle is based on these lines.
A further method is likewise described in the above-quoted publication, in which it is stated that it should also be possible to store more than one bit per storage cell in a CCD store. This principle is referred to as multi-level storage (MLS). With this principle, the property of CCD arrangements is exploited to enable the processing of analog signals. In order, for example, to be able to store a four-digit binary number, 16 different charge values are required. In accordance with binary signal occurring in parallel form on, for example, four lines (in accordance with four bits of the binary number ), 0, 1, 2, . . . 14 or 15 times a suitable selected charge unit, which in the following will be referred to as a unit charge, is input into the CCD storage field. A decoder circuit of appropriate construction is required for this purpose. An evaluator circuit at the output of the CCD storage field must establish the size of the incoming quantity of charge and reconvert this 1-out-of-16 signal into the four bit signal. The information is then returned in this form to the input of the storage field, thus to the decoder circuit.
Therefore, if a n-digit binary number is to be stored beneath a storage position of a CCD storage module, a quantity of charge composed of i unit charges must be transmitted to this storage position where i corresponds to the value of the binary number of the information. Here, i .ltoreq. (2.sup.n -1).
It is also advantageous to transmit a basic charge of, for example, the magnitude of the unit charge in addition to the quantity of charge corresponding to the information. This basic charge serves to avoid transmission losses arising from surface states on the semiconductor substrate. In this case 2.sup.n charge levels are passed through the store, the basic charge and, in dependence upon the information, up to (2.sup.n -1) further charge levels.